The present invention relates generally to integrated circuits, and more particularly, to an antifuse for integrated circuits.
Integrated circuits are interconnected networks of electrical components fabricated on a common foundation called a substrate. The electrical components are typically fabricated on a wafer of semiconductor material that serves as a substrate. Various fabrication techniques, such as layering, doping, masking, and etching, are used to build millions of resistors, transistors, and other electrical components on the wafer. The components are then wired together, or interconnected, to define a specific electrical circuit, such as a processor or a memory device.
Fusible elements are employed in integrated circuits to permit changes in the configuration of the integrated circuits after fabrication. For example, fusible elements may be used to replace defective circuits with redundant circuits. Memory devices are typically fabricated with redundant memory cells. The redundant memory cells may be enabled with fusible elements after fabrication to replace defective memory cells found during a test of fabricated memory devices.
One type of fusible element is a polysilicon fuse. The polysilicon fuse comprises a polysilicon conductor fabricated to conduct electrical current on an integrated circuit. A portion of the polysilicon fuse may be evaporated or opened by a laser beam to create an open circuit between terminals of the polysilicon fuse. The laser beam may be used to open selected polysilicon fuses in an integrated circuit to change its configuration. The use of polysilicon fuses is attended by several disadvantages. Polysilicon fuses must be spaced apart from each other in an integrated circuit such that when one of them is being opened by a laser beam the other polysilicon fuses are not damaged. A bank of polysilicon fuses therefore occupies a substantial area of an integrated circuit. In addition, polysilicon fuses cannot be opened once an integrated circuit is placed in an integrated circuit package, or is encapsulated in any manner.
Another type of fusible element is an antifuse. An antifuse comprises two conductive terminals separated by an insulator or a dielectric, and is fabricated as an open circuit. The antifuse is programmed by applying a high voltage across its terminals to rupture the insulator and form an electrical path between the terminals. One common type of antifuse is an oxide-nitride-oxide (ONO) antifuse. An ONO antifuse comprises a layer of nitride sandwiched between two layers of oxide, where each layer of oxide is in contact with a polysilicon terminal. The ONO sandwich is a dielectric and the ONO antifuse functions as a capacitor before it is programmed. One disadvantage with ONO antifuses is that they are fabricated with separate, extra steps when an integrated circuit is fabricated.
Accordingly, there exists a need for improved fusible elements for use in integrated circuits.
The above mentioned and other deficiencies are addressed in the following detailed description. According to one embodiment of the present invention a first programming voltage is coupled to a well of a first conductivity type in a substrate of a second conductivity type in an antifuse. A second programming voltage is coupled to a conductive terminal of the second conductivity type in the antifuse to create a current path through an insulator between the conductive terminal and the well to program the antifuse. The first programming voltage may be coupled to an ohmic contact in the well in the antifuse. According to another embodiment of the present invention a very high positive voltage is coupled to an n+-type diffusion region in an n-type well in a p-type substrate in an antifuse from an external pin in an integrated circuit including the antifuse. A ground voltage reference is coupled to a layer of p-type polysilicon in the antifuse to create a current path through an insulating layer of oxide between the layer of p-type polysilicon and the n-type well to program the antifuse. According to another embodiment of the present invention a very negative voltage is coupled to a p+-type diffusion region in an p-type well in an n-type substrate in an antifuse from an external pin in an integrated circuit including the antifuse. A supply voltage is coupled to a layer of n-type polysilicon in the antifuse to create a current path through an insulating layer of oxide between the layer of n-type polysilicon and the p-type well to program the antifuse.
Antifuses according to embodiments of the present invention may be fabricated according to process steps used to fabricate field-effect transistors in an integrated circuit, and do not require extra process steps. In addition, the use of an external pin to couple an elevated voltage to the antifuses for programming substantially protects other portions of an integrated circuit from damage that may be caused by the elevated voltage. Other advantages of the present invention will be apparent to one skilled in the art upon an examination of the detailed description.